FPGA Based Resolver to Digital Converter Using Delta-Sigma Technology

This contribution describes a new FPGA based method to convert the analog resolver signals to a digital position signal using Delta Sigma ADC technology. By using a 2 order ∆Σ modulator it is possible to increase the effective resolution. In a servo drive the significant better signal to noise ratio can be used to build a smoother motor current (less noisy), or to increase the tracking loop bandwidth. Due to ∆Σ modulation EMI noise from the IGBT power stage can be suppressed in an efficient way by using digital filters implemented in an FPGA. Introduction High performance servo drives are still a fast growing market segment. Resolvers are commonly used motor position sensing devices, fig. 1. Also, most modern controllers derive velocity feedback from the position sensor. The resolver is an electromagnetical, rotational device that detects angular displacement. An equivalent electrical representation and diagram of typical output signal formats are shown in fig. 2. An ac excitation signal applied to the primary (rotor, ref) is inductively coupled to the two secondary (stator, sin and cosine). The transformation ratios are amplitude modulated by the sine and cosine of the angle of the rotor relative to the stator, θ. Fig. 1: Size 21 resolver (LTN) Due to the transformation principle an ac excitation or reference signal is necessary: ( ) t f E V V V ⋅ ⋅ = − = C 0 R4 R2 REF 2 sin π (1) The carrier frequency fC is always a compromise. To achieve low delay times with the conversion system a relatively high frequency is helpful. Regarding to long cables and the mechanical resolver construction the carrier frequency is limited. Most resolver data sheets are recommending a carrier frequency of 5 to 10 kHz. In servo drive applications this frequency is very often linked to the power stage switching frequency and the servo loop update rate. Fig. 2: Electrical representation of a resolver